CMOS High Efficiency On-chip Power Management

John Hu, Mohammed Ismail - CMOS High Efficiency On-hew Power Management
Published: 2011-09-02 | ISBN: 1441995250 | PDF | 132 pages | 3 MB

This part deals with the subject matter of potentate management integrated circuit (IC) design, or integrated ability electronics, as a response to the extending need for energy-efficient electronics. The authors be the first to take up various power management IC design techniques to construction future energy-efficient “green” electronics. The goal is to accomplish high efficiency, which is essential to convenient consumers’ growing need for longer battery lives. The converging-point is to study topologies amiable despite full on-chip implementation (few extrinsic components) in the mainstream CMOS technology, what one. will reduce the physical size and the manufacturing cost of the devices. Describes a numeral of techniques at circuits and systems flush that increase sleep-mode efficiency to defer the battery life, without sacrificing composition parameters; Enables readers to design by reason of compactness, which requires fewer bulky external components and circuit topologies that impart themselves easily to full on-chip integration;Offers insights on how the efficiency boosting techniques in opposition to power management IC designs work with respect to society’s quest for higher intensity efficiency.